Details of final prototype of FEE interface circuitry for FGT APV Readout Module "ARM". This includes the isolated remote-regulated power supplies, the isolated I2C line interface, the isolated LVDS clock & trigger line drivers, and the differential analog receiver. Cable connectors and pinouts here are proposed for final application. (In actual ARM, cables interface through a rear transition board in the crate through the 96-pin DIN connector to ARM module. This is not implemented here - cables connect directly using same connector type and pinouts on the cables.)
Here are the details:
- schematic (component values are preliminary)
- board fab data
- picture
