*** Master mapping FGT 2012

 This is the summary of mapping convention used for FGT in 2012

Attachemnts contain details strip/APV mapping for all quadrants, the same infor is in CSV table

Primary mapping

 RDO(1;2),

ARM(0-4)

APV(0-9;12-21)

chan(0-127),

disk(1-6),

quad(A-D),

octant (L;S)

layer(P;R)

strip(P:0-719; R:0-279+400-679)

Secondary indices, assumes ranges form the above:

for 140 APV chips in 2012 are mapped to some of 240 bins:

   int binAPV= (disk-1)*40 + (quad-'A')*10 +  (apv%12)

for 14 quadrants in 2012  are mapped to some of 24 bins:

int binQuad= (disk-1)*4 + quad-'A'

for 28  octants in 2012  are mapped to some of 48 bins:

int binOct= (disk-1)*8 + (quad-'A') *2 +  (oct=='S')


Table 1


Fig 1 below

Fig 2 a, b

 


Table 2

Mapping of FGT HV cables to quadrants
power supply supply chan Quadrant HV cable
0  0  1A 13
0  1  1B 11
0  2  1C 15
0  3  1D 16
0  4  2A 10
0  5  2B 12
 1  0  3A  9
 1  1  3B  3
 1  4  4A  7
 1  5  4B  1
 2  0  5A  2
 2   1  5B  8
2  4  6A  5
 2   5  6B  6

 

 


Fig X. Numbering scheme for HV segments, location of spacer grids

Fig Y . Ranges of R-strips served by 10 APVs in a quadrant.

p>Fig YZ . R and P-strips served by 5 APVs in one octant