Calibration table for SSD chip

proposal to change the gain calibration to be done at the DaqMaker level.
Pros :

1. less possible errors done in strips mapping
2.  possibility to do the calibration chip-by-chip, instead of wafer by wafer as it is right now

Cons :

1. previous calib were on the hit/cluster level ; here the plan is to correct ADC at the strip level

The idea is to make :

1. histograms of  the total ADC per chip and side (P,N)
2. histograms of # of counts (= channels) per chip and side (P,N)
3. the gain will be ratio  = ( ADC_sideP / counts_sideP) / (ADC_sideN / counts_sideN )
4. then the correction is done in the DaqMaker when writing spa_strip table and by correcting , if side = N , by adc * ratio

1) Structure of the table


The table will have 1920 elements. Unlike the hotChip table (where the adress of chips to flag were saved), here we saved all the elements. 1 will be the default gain (meaning no gain)

2) table is initialized in StSstDbMaker


3) Access from another maker is done using the method chipGain()


4) making the calibration
Some histograms are saving the total ADC for each chips (signal of ach channel in a chip) as well as the number of counts for each chip, over a number of events processed by the BFC chain (example here)

Then the relative gain between P and N side is the ratio of the average ADC on P side over the average ADC on N side.

gain  = <ADC_sideP> / <ADC_sideN>

We need to be careful to do the inversion of the chip index of N-side to associate the same chips of P and N sides.


bal blah