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StiScan for SST
note : work in progress ...
using StiScan tool, I looked at the implementation of inactive material for the SSD (some details in this HFT soft meeting)
1) Eloss for SFSM volume (support ladder)
2) Eloss for SFDM volume (wafer)
comments
SFSW has 6 daughters ( = wafer), each daughter has 15 volume
SFSM has only 25 daughters
### update : 20140807 ###
SSD geometry tree
a) ladder volume [full] : SFLM --> daughters :
b) ladder volume [sensor] SFDM/SFSW --> daughters
c) ladder volume [support] SFSM --> daughters
--> 497 daughters
However, 87% of these volumes are kapton cables (volume SFLA, SFLB and SFLC) which have a thichness of 0.0070cm [70 microns]
[see pictures below]
So a potential gain in CPU time would be 1) to remove these volumes 2) to group them as a big box (StiShape)
using StiScan tool, I looked at the implementation of inactive material for the SSD (some details in this HFT soft meeting)
1) Eloss for SFSM volume (support ladder)
2) Eloss for SFDM volume (wafer)
comments
- inactive material distribution for SFSM (ladder) looks okay
- inactive material distribution for SFDM (wafer) is located ~0 (therefore wrong) ; the reason is because these volumes are local to a wafer
SFSW has 6 daughters ( = wafer), each daughter has 15 volume
root.exe [12] dyson->cd("HALL_1/CAVE_1/TpcRefSys_1/IDSM_1/SFMO_1/SFLM_1/SFDM_1/SFSW_1") root.exe [13] node->GetNdaughters() (const Int_t)16 root.exe [14] TGeoNode *node = dyson->GetCurrentNode() root.exe [15] node->GetNdaughters() (const Int_t)25
SFSM has only 25 daughters
root.exe [1] dyson->cd("HALL_1/CAVE_1/TpcRefSys_1/IDSM_1/SFMO_1/SFLM_1/SFSM_1") root.exe [2] TGeoNode *node = dyson->GetCurrentNode() root.exe [3] node->GetNdaughters() (const Int_t)497
### update : 20140807 ###
SSD geometry tree
a) ladder volume [full] : SFLM --> daughters :
root.exe [10] dyson->cd("HALL_1/CAVE_1/TpcRefSys_1/IDSM_1/SFMO_1/SFLM_1") daughter 0 : SFDM_1 daughter 1 : SFSM_1--> 2 daughters
b) ladder volume [sensor] SFDM/SFSW --> daughters
root.exe [19] dyson->cd("HALL_1/CAVE_1/TpcRefSys_1/IDSM_1/SFMO_1/SFLM_1/SFDM_1/SFSW_1") root.exe [21] for(int ii=0;ii<node->GetNdaughters();++ii){cout <<" daughter " << ii <<" : " << node->GetDaughter(ii)->GetName() << endl;} daughter 0 : SFSL_1 daughter 1 : SFRA_1 daughter 2 : SFRA_2 daughter 3 : SFRS_1 daughter 4 : SFRS_2 daughter 5 : SFRS_3 daughter 6 : SFRS_4 daughter 7 : SFFX_1 daughter 8 : SFFX_2 daughter 9 : SFPI_1 daughter 10 : SFPI_2 daughter 11 : SFPI_3 daughter 12 : SFPI_4 daughter 13 : SFAA_1 daughter 14 : SFAA_2 daughter 15 : SFAA_3 daughter 16 : SFAA_4 daughter 17 : SFAA_5 daughter 18 : SFAA_6 daughter 19 : SFAA_7 daughter 20 : SFAA_8 daughter 21 : SFAA_9 daughter 22 : SFAA_10 daughter 23 : SFAA_11 daughter 24 : SFAA_12
--> 25 daughters
c) ladder volume [support] SFSM --> daughters
root.exe [18] for(int ii=0;ii<node->GetNdaughters();++ii){cout <<" daughter " << ii <<" : " << node->GetDaughter(ii)->GetName() << endl;} daughter 0 : SFLT_1 daughter 1 : SFLT_2 daughter 2 : SFLU_1 (...) daughter 494 : SFES_16 daughter 495 : SFEB_15 daughter 496 : SFEB_16
However, 87% of these volumes are kapton cables (volume SFLA, SFLB and SFLC) which have a thichness of 0.0070cm [70 microns]
[see pictures below]
So a potential gain in CPU time would be 1) to remove these volumes 2) to group them as a big box (StiShape)
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