EPD Analysis - 32b vs 32c, timing, correlations, etc.
I am now completely confused about where we are. I have analyzed runs 18113012 and 18113013, recorded this Sunday so their configuration should be the most recent. I have used Mike's code to analyze the data, with mapping file: epdMap.txt.04052017
First question: Is this the most recent mapping? I believe there may have been some additional swapping around of boards in the tests of the QT32c.
First I looked at the ADC spectra for all channels:
drupal.star.bnl.gov/STAR/system/files/ADC_Totals_18113.png
Also plotted channel-by-channel:
drupal.star.bnl.gov/STAR/system/files/ADC_18113.pdf
First note - I realized that the file the the new vbias values was not uploaded. Mea Culpa.... So this is why the MIP peaks aren't all lined up. I will change this and recheck, but I don't think this is particularly important at the moment.
I note that PP = 5, Tile = 6 is the only tile not showing a signal.
From the April 12th email from Prashanth, I see:
*******
EPD Access Action Item I
1) Test pulse from RCC2 is T-split. One is connected to e-scope ch#1
(redacted). Second is connected to 0x16-QTC 4th channel (ADC).
Corresponding TAC is 8th channel. QT gate from 0x16 is connected to ch3
of scope.
Diff/Rx 4th board 4th channel is un-plugged. In EPD plots PP5 Tile-6
shows test pulse.
2) PP5 Tile-2 is Resistive splitted.
One is connected to QTC 0x16 2nd channel(ADC). Corresponding TAC is 6th
channel.
Second is connected to QTC 0x16 3nd channel(ADC). Corresponding TAC is
7th channel.
In EPD plots:
PP5 Tile 2 show QTC 0x16 2nd channel
PP5 Tile 4 show QTC 0x16 3nd channel
********
I think this explains the lack of signal in PP5 TT6.
PP = 5, Tile = 30 looks like the pedestal wasn't correct.... I will not worry about this for the moment.
Next, I will look at the ADC vs TAC, which can be found at:
drupal.star.bnl.gov/STAR/system/files/ADC_TAC_18113.pdf
These were run with a Tier 1 file that had the following values: (April 18 from Prashanth)
For comparison, my earlier study can be found at:
drupal.star.bnl.gov/STAR/system/files/ADC_TAC_18103001.pdf
(Still looks weird on the QT32c TAC - ADC values)
*****
New tier1 file is uploaded with best values, from run 18108080.
The values are
Gate Start Gate Stop TAC stop
data start address
0x10(QTB) 99 115 -
9
0x12(QTB) 99 115 -
9
0x16(QTB) 99 115 22
8
0x18(QTC) 99 115 32
9
Online plots look good for QTB boards
*****
I would agree that these look reasonable for the QT32B board. Personally I think the TAC stop also looks fine, so I think we can continue with the 32B studies.
However, the QT32C board looks completely weird (ignoring for a moment the spike issue). We have seen ADC TAC distributions that looked reasonable for this in the past, so I think we have confused ourselves in all the settings.
First we should remind ourselves of the scan data that Mike had analyzed:
See: drupal.star.bnl.gov/STAR/subsys/epd/operations-2017/timing
Conclusion: Detailed scan [-32,+16] - shows best START for QT32Bs is -8 and best START for QT32Cs is -20
drupal.star.bnl.gov/STAR/system/files/GateScan_1.pdf
In my earlier analysis, I concluded that our QT32C values from run 18100007 were correct.
We need to put the QT32C in correctly - First do a test run to confirm the setting, then set the start and stop. We may need another stop scan for this.
Then I started looking at correlations with the BBC. It's not so easy to see where the correlation should be, I used Joey's presentation at:
drupal.star.bnl.gov/STAR/system/files/EPD%20Presentation.pdf
It seemed that BBC Tile 3 was a tile under the EPD. But it looked like he was using BBC tile 5. I must admit, I am confused.
I correlated the EPD (each tile) in two tiles as can be seen in:
Accessed BBC through: data->BBCadc[0][2]
drupal.star.bnl.gov/STAR/system/files/BBC_5_18113012.pdf
Accessed BBC through: data->BBCadc[0][5]
drupal.star.bnl.gov/STAR/system/files/BBC_2_18113012.pdf
It would be nice to have a smoking gun FOM.
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