We will be using vped (a int between -128 and 127) to check the mapping of the EPD from the FEE cards through the QT cards.  Additionally, we will want to set the vped so that the DC offset is minimized, such that the pedestals are the same regardless of whether the CAMACs holding the diff-Rx cards are on or off.

A first set of data taken after completion of the mapping using pedestal rhic clock clean runs is:
19047003:  Vped = +20
19047004:  Vped =  -20
19047005:  Vped = +90
19047006:  CAMACs off

The results can be seen at:
Big plots: drupal.star.bnl.gov/STAR/system/files/Compare_big_vped02162018.pdf

Small plots: drupal.star.bnl.gov/STAR/system/files/Compare_small_vped02162018.pdf

The mapping details were recorded by Prashanth at: drupal.star.bnl.gov/STAR/subsys/epd/operations-2018/mapping

An example QT32B plot:

Figure 1: QT32B board in EQ1 at 0x10 channel 0.  (I believe this should be connected to table { }td { padding-top: 1px; padding-right: 1px; padding-left: 1px; color: black; font-size: 12pt; font-weight: 400; font-style: normal; text-decoration: none; font-family: Calibri, sans-serif; vertical-align: bottom; border: medium none; white-space: nowrap; }.xl63 { text-align: center; vertical-align: middle; border: 0.5pt solid rgb(89, 89, 89); background: rgb(0, 176, 240) none repeat scroll 0% 0%; }.xl64 { text-align: center; vertical-align: middle; }ew = 1, pp = 1, tt =24).  The nominal value of vped = 20 is slightly high, the average in 2017 was about 11.  The two large extremes chosen span a bit far, but it seems that a +70 (for vped = 90), makes a very easy to see pedestal peak.

An example QT32C

Figure 2: QT32C board in EQ1 in slot 0x19.