Fast Offline Pedestal QA for the FGT -- iteration 2

Next iteration of QA plots for the pedestals and strip status.

See this blog for iteration 1.  Only items new or changed are detailed in this blog.

Strip Status

Status bits are failure states, i.e. status of 0 is good, anything else is bad.  Strip status bits are defined as

  • bit 1: pedestal out of range (current range is 100-1200 ADC)
  • bit 2: RMS out of range (current range is 10-80 ADC)
  • bit 3: Fraction of integral near pedestal value (i.e +/- 1 RMS of the pedestal) out of range (current range is 0.6 to 0.95)
  • bit 4: not used
  • bit 5: APV chip bad (threshold is currently 64 dead strips)
  • bit 6: strip not connected
  • bit 7: no adc from channel - cannot determine pedestal+rms

Note, for bit 5, all strips are set to have this bit fail if more than the threshold number of strips on this APV failed the tests corresponding to bits 1-3.

Plot Layout

The bottom plot on page 1 of iteration one has been moved to the top plot on page 1, and changed to be the number of good strips per APV.  On all plots on the first page, red horizontal lines have been drawn at the thresholds described in the strip status section above.

The x-axis labels on the first page, and the titles on the subsequent pages, now label the position of the APV card.  For example, the 5 APV chips on 1A.L are on disc one, quadrant A, and on the APV board on the long side (i.e. the one farther from the HV board).

The pdf for running on the same Dec. 15th file is attached, as well as the text file.