SN0241 : The STAR TPC FEE HDLC Link
Updated on Mon, 2007-06-18 19:57. Originally created by chajecki on 2007-06-18 19:57.
| Author(s) | : | P. Barale, F. Bieser, J. Hunter, S. Jacobson, S. Klein, C. McParland |
| Date | : | Feb. 13, 1996 |
| File(s) | : | sn0241.ps.gz |
| Abstract | : | The STAR TPC requires a slow controls link to the readout boards for a number of monitoring, control and testing tasks. A number DC voltages and temperatures must be monitored periodically, and the health of the clock and trigger distribution monitored. The required control tasks include controlling power to groups of FEE cards and programing the SAS chip. The requirement for network speed is that the slow controls network be abel to read out TPC data for testing purposes. Each TPC readout board produces over a MB of data per event, we want to link speed to be at least in the 10's of kbytes/sec.
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